A Study of Non-Blocking Switching 

 Networks 



By CHARLES CLOS 



(Manuscript received October 30, 1952) 



This paper describes a method of designing arrays of crosspoints for 

 use in telephone switching systems in which it will always he possible to 

 establish a connection from an idle inlet to an idle outlet regardless of the 

 number of calls served by the system. 



INTRODUCTION 



The impact of recent discoveries and developments in the electronic 

 art is being felt in the telephone switching field. This is evidenced by 

 the fact that many laboratories here and abroad have research and 

 development programs for arriving at economic electronic switching 

 systems. In some of these systems, such as the ECASS System,* the 

 role of the switching crossnet array becomes much more important than 

 in present day commercial telephone systems. In that system the com- 

 mon control equipment is less expensive, whereas the crosspoints which 

 assume some of the control functions are more expensive. The require- 

 ments for such a system are that the crosspoints be kept at a minimum 

 and yet be able to permit the establishment of as many simultaneous 

 connections through the system as possible. These are opposing require 

 ments and an economical system must of necessity accept a compromise. 

 In the search for this compromise, a convenient starting point is to study 

 the design of crossnet arrays where it is always possible to establish a 

 connection from an idle inlet to an idle outlet regardless of the amount 

 of traffic on the system. Because a simple square array with N inputs, 

 N outputs and N^ crosspoints meets this requirement, it can be taken 

 as an upper design limit. Hence, this paper considers non-blocking arrays 

 where less than N^ crosspoints are required. Specifically, this paper 

 describes for an implicit set of conditions, crossnet arrays of three, five, 



* Malthaner, W, A.,andH. Karle Vaughan,An Experimental Electronically 

 Controlled Switching System. Bell Sys. Tech. J., 31, pp. 443-468, May, 1952. 



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