SEMICONDUCTOR DIODE GATES 



1141 



arrow aimed at the box represents a control; an arrow on a line, aimed 

 aw^ay , represents an output connection ; a control input with a small semi- 

 circle represents an inhibiting control. This combination satisfies what 

 is called the and not requirements. A pulse appearing at input (1) will 

 pass gate (1) if there is no pulse simultaneously on gate (2). Similarly, 

 a pulse on input (2) will pass gate (2) . If pulses appear simultaneously on 

 both inputs, each will inhibit the passage of the other and there will be 

 no output. 



In practice there are many complications encountered in using these 



n' 



u 



Fig. 3 



I I 



-C, +Cz 



Gate with inhibiting control. 



gates. In particular, networks using the inhibiting control can, in the 

 simple form show, get into difficulty due to the fact that pulses may not 

 be exactly simultaneous. These difficulties are overcome in practical 

 circuits by making part of the control voltages essentially dc potentials 

 which set up the control conditions so that a final control pulse may 

 produce an output, or be blocked, as the case requires. In a great many 

 systems, this final pulse is an additional ''clock pulse" from a master 

 control or clock which synchronizes the sequence of operations of the 

 entire computer. The details of how this is done and how the three 

 types of gate may be combined is outside the scope of this paper. During 

 the last few years there has been an extensive literature build up in the 

 technical journals and a few books^ published in this field. 



transmission gate 



Rather than analyze in detail the many forms a gate may take, only 

 two forms wall be discussed here. The methods (and in many cases the 



2 Keister, Ritchie and Washburn, The Design of Switching Circuits^ Van 

 Nostrand. Hartrie, Calculating Instruments and Machines, Univ. of Illinois Press. 



