SEMICONDUCTOR DIODE GATES 1145 



DISABLED GATE 



The condition under which the gate is held disabled is much simpler 

 than the enabling conditions. All that is necessary is that Vi be held more 

 negative than the most negative signal generator voltage : 



Fi<Fo<0 (14) 



If equations (4), (5), and (6) are used in the disabled case (i.e., with 

 the gr's and G's interchanged), the condition can be obtained: 



When g is much smaller than Go, so that the signal generator is effectively 

 open circuited, this is a direct comparison of voltage components on the 

 two sides of the input diode. The first term on the left, is the positive 

 voltage at the midpoint (Fi) due to the bias current h. The term on the 

 right of the inequality is approximately the open circuit signal generator 

 voltage. The inequality says that Eb must be sufficiently negative to 

 overcome the positive bias and hold the midpoint more negative than 

 the most negative signal voltage. 



OPTIMUM CONDITIONS 



What constitutes optimum conditions depends on the particular re- 

 quirements of the associated circuit. It is, however, always true that the 

 diode conductance ratio should be as large as possible: 



G/g as large as possible. 



For minimum power loss the gate, which is a resistive T network, to the 

 approximation considered here, should be terminated in its characteristic 

 conductance : 



For small volltage loss the terminating conductance should be small: 



Go«G 



For good discrimination (large loss in the disabled state) the terminating 

 conductance should be large: 



