DIFFUSED EMITTER AND BASE SILICON TRANSISTORS 3 



mum layer thicknesses (see Sections 3 and 4) are not produced by simul- 

 taneous diffusion. In this case, one of the impurities is started ahead of 

 the other in a prior diffusion, and then the other impurity is diffused 

 in a second operation. 



With the proper choice of diffusion temperatures and times it has been 

 possible to make n-p-n structures with base layer thicknesses of 2 X 10~* 

 cm. The uniformity of the layers in a given specimen is better than ten 

 per cent of the layer thickness. Fig. 1 illustrates the uniformity of the 

 layers. This figure is an enlarged photograph of a view perpendicular 

 to the surface of the specimen. A bevel which makes an angle of five 

 degrees with the original surface has been polished on the specimen. This 

 angle magnifies the layer thickness by 11.5. The layer is defined by an 

 etchant which preferentially stains p-type silicon^ and the width of the 

 layer is measured with a calibrated microscope. 



After diffusion the entire surface of the silicon wafer is covered with 

 the diffused n- and p-type layers, see Fig. 2(a). Electrical contact must 

 now be made to the three regions of the device. The base contact can 

 be made by polishing a bevel on the specimen to expose and magnify 

 the base layer and then alloying a lead to this region by the same tech- 



f.^ *f^'- *; 



'>i 



i * /i 



n-TfPE DIFFUSED LAV^ER 

 fo-t^^E*OiFFUSED LAYER 



i»# 



OF^GIt^L n-TYPE 

 CRYSTAl. 



I 1 EQUIVALENT TO 2 X lO"'* CM 



LAYER THICKNESS 



Fig- 1 — Angle section of a double diffused silicon wafer. The p-type center 

 ayer is approximately 2 X 10-< cm thick. 



