1 



lU-i THE BELL SYSTEM TECHNICAL JOURNAL, SEPTEMBER 1956 



cuit or collection of circuits can result in an amplifier suitable for use 

 in every type of digital system. The use of an AND type input circuit, 

 transformer coupled output and feedback circuits, and an inhibit type 

 synchronizing circuit appear to be an optimum set of functional circuits 

 to make up an amplifier for use in a synchronous digital computer system 

 emplojdng passive logic circuits. An illustrative design is presented for 

 such an amplifier which operates at a pulse repetition rate of 1 mc, 

 uses 12 components (none of which are especially critical), requires an 

 average of 40-mw dc power and 1-mw clock power, is capable of driving 

 from 1 to 12 similar amplifiers, and has voltage margins in excess of 12 

 per cent. Although the design philosophy was developed for this type of 

 amplifier, it is believed that much of the philosophy is applicable to 

 regenerative amplifiers for use in other digital data processing systems. 



9. ACKNOWLEDGEMENT 



The final design and the performance data of the illustrative amplifier 

 are due to L. C. Thomas and H. E. Coonce. The author also wishes to 

 express his appreciation for the many helpful and stimulating discus- 

 sions with other colleagues, especially A. J. Grossman, T. R. Finch, 

 J. H. Felker, and J. R. Harris. 



REFERENCES 



1. S. Greenwald, et al., SEAC, Proc. I.R.E., Oct., 1953. 



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