982 THE BELL SYSTEM TECHNICAL JOURNAL, JULY 1957 



Some of this discrepancy can be attributed to the fact that the junction 

 is not truly an abrupt junction. A "graded" junction would yield A^ 

 equals 3. Measurements of capacitance versus voltage, which essentially 

 measure the width of the space-charge region, yield A^ equals 2.4. Thus, 

 these devices in the relatively low voltage range still have some contri- 

 bution from the gradation of the diffused junction. 



The highest temperature points in Fig. 2 deviate above the straight 

 lines. This deviation can be attributed to the onset of the contribution 

 from the h component. Calculations indicate that, by T = 220° C, the 

 contribution to the reverse current by the space-charge current is equaled 

 by the saturation current and that, by T = 820° C, the space-charge- 

 generated current is negligible compared to the saturation current. 



Ill BREAKDOWN VOLTAGE OF PN AND PIN JUNCTIONS 



3.1 Theory 



It has been demonstrated that, in germanium ' and silicon, reverse 

 biased junctions breakdown as a result of a solid state analogue of the 

 Townsend ^ Avalanche Theory. Multiplication and breakdown occur 

 when electrons or holes are accelerated to energies sufficient to create 

 hole-electron pairs by collisions with valence electrons. The breakdown 

 phenomena in silicon for graded and step junctions has been previously 

 considered.*' ^^ Depending on the impurity distribution, the field in the 

 junction will be a function of distance and will have a maximum value in 

 the region of zero net impurity concentration. The breakdown voltage is 

 a critical function of the space-charge distribution. 



In this section the existing multiplication theory is extended to the 

 case of PIN junctions. It is shown that relatively wide intrinsic regions 

 are required to obtain breakdown voltages greater than 1000 volts. 



Fig. 3 is a plot of the impurity, charge, and field distributions in PIN 

 and PttN junctions. Fig. 3(a) schematically illustrates the geometry of 

 the three region devices considered, and Fig. 3(b) is a plot of the impurity 

 distribution. In this analysis step junctions will be assumed. For the 

 PIN junction there are no uncompensated impurities in the intrinsic 

 region, and no net charge. At low reverse voltage, the field will sweep 

 through the intrinsic layer and will increase with increasing reverse bias 

 until the breakdown field is reached. 



Absolutely intrinsic material is not yet available, and devices are 

 made from high resistivity x-type material. In this class of devices there 

 is some uncompensated impurity and charge in the center region. The 

 field will have a maximum value at the N^ tt junction and will decrease 



