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BELL SYSTEM TECHNICAL JOURNAL 



equivalents could be provided under the plan even for the maximum 

 number of switches using standards for the construction of toll circuits 

 very comparable with those already applied to new circuits. Ex- 

 pressed in terms of the transmission reference standard, the plan set 

 up gives a maximum of 25 db overall equivalent within one inter- 

 connected area (two intermediate switches) and a maximum of 31 db 

 between any two telephones of the United States and eastern Canada. 



In order to determine the most economical distribution of these 

 overall equivalents, a study was made based upon the estimated 

 total number of toll circuits of each class in 1932 and their distribution 

 by length. It is also necessary to include the corresponding estimates 

 for the plant between the toll office and the subscriber, the loss in 

 this part of the plant being on the average about half of the overall 

 net equivalent of the connection. 



Based upon these estimates, it was possible to determine, by an 

 economic study, the distribution of the overall minimum net equivalent 

 between these various parts of the circuit which would give minimum 

 total expenses. The toll terminal losses and the minimum net equiva- 

 lents for toll circuits established in this way are shown in Fig. 9. 



* Circuits equipped with echo suppressors may be designed with greater negative 

 margins. 



Fig. 9 — Transmission design data of general toll switching plan. 



In addition to the circuits involved in multi-switch business, the 

 studies connected with this plan necessarily include circuits used for 

 terminal business only, and others for which switching is limited to 

 a single intermediate switch at points where transmission gain is not 

 required. These circuits are associated with the plan because the 

 portions of the circuit between the toll center and the subscriber are 

 common for these circuits and for circuits directly involved in the 

 general plan. Design standards for these classes of circuits are also 

 shown in I'ig. 9. 



